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# Release Notes for STM32F105/7xx, STM32F2xx and STM32F4xx USB OTG Driver Copyright 2015 STMicroelectronics
## Update History ### V2.2.0 / 09-November-2015 Main Changes Add support of STM32F469/479xx and STM32F446 devices usb_dcd_int.c Bug Fix: Masking the TxFIFOempty interrupt of the endpoint after finishing writing data packet to TxFIFO in DCD_WriteEmptyTxFifo function Bug Fix: The USB TRD (Turnaround) is configured depending on AHB frequency used by application. Bug Fix: Handle multi-packet for OUT transfer with DMA in HS mode Remove CLEAR_IN_EP_INTR(epnum, emptyintr) in USBD_OTG_EP1IN_ISR_Handler and DCD_HandleInEP_ISR Correct PCFCCTL register access usb_core.c USB_OTG_HC_Halt function: Modify Channel halt function to disable the channel at the end Correct PCFCCTL register access Bug Fix: Handle multi-packet for OUT transfer with DMA in HS mode Bug Fix: Keep the disconnect interrupt maskedIn function USB_OTG_EnableHostInt for correct handling of connection/disconnection In function USB_OTG_ResetPort change reset time to 100ms instead of 10ms for better stability during enumeration usb_hcd.c Add function HCD_IsPortEnabled to check portenabled for correct handling of connection/disconnection usb_hcd_int.c Remove USB_OTG_ResetPort(pdev) calling Update USB_OTG_USBH_handle_port_ISR for correct handling of connection/disconnection Disconnect interrupt is unmasked after a connection Creation of PortEnabled event (need to wait for this event before starting enumerating device) Halt channel and restart transfer is removed When using DMA (HS) In case of NAK or NYET in USB_OTG_USBH_handle_hc_n_Out_ISR and USB_OTG_USBH_handle_hc_n_In_ISR Clearing the NAK interrupt flag before re-enabling the channel for a new transfer in USB_OTG_USBH_handle_hc_n_In_ISR function ### V2.1.0 / 19-March-2012 Main Changes Official support of STM32F4xx devices All source files: license disclaimer text update and add link to the License file on ST Internet Unmask Session request interrupt to handle the connect event during the core start-up Remove any reference to the USB HS external I2C PHY Update optimization pragma for AR Compiler Handle Correctly the Low Speed device connection in HS mode Add a wrapper to isolate the library from the low level driver: connection done through ISR structure Miscellaneous bug fix ### V2.0.0 / 22-July-2011 Main Changes Second official version supporting STM32F105/7 and STM32F2xx devices Rename the Library from "STM32_USB_HOST_Driver" to "STM32_USB_OTG_Driver" Add support for STM32F2xx devices Add support for Device and OTG modes Change HCD layer to support High speed core Change the Low level driver to support multi core support for Host mode Add Stop mechanism for Host and Device modes Change VBUS enabling method, to use the external or the internal VBUS when using the ULPI ### V1.0.0 - 11/29/2010 Created ## License Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); You may not use this package except in compliance with the License. You may obtain a copy of the License at: http://www.st.com/software_license_agreement_liberty_v2 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. For complete documentation on STM32 Microcontrollers visit www.st.com/STM32